Broad industry expertise in all solder and Cu pillar wafer bumping RDL and UBM technology options used for fine pitch, high I/O flip chip in package applications or Wafer Level Packaging with a solid track record of successful OSAT deployments and HVM
Cu pillar bumping process development for ultra-fine pitch flip chip on lead applications (sub-50 to 150 micron pitch) and extensive module miniaturization assembly experience
Broad materials and process development Open Innovation within WLP and traditional IC packaging industry segments to accelerate and optimize advanced packaging solutions
Proven skills in successfully transferring WLP technologies including on-site participation in equipment set decision making and factory planning for both green field and capability expansions within existing OSAT factories
Diverse Fab - OSAT process integration involvement in 2, 2.5 , 3D and WLP based heterogeneous packaging innovation
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